Description
Do you enjoy working as part of a team? Do you thrive in a small, family-like atmosphere? Are you interested in working on cutting edge technology?
We are currently adding to our team and are looking for 2 people to join us as Layout Engineer Interns. After the 6 month internship is complete, your work will be evaluated and you will be considered for a full time Layout Engineer position.
The work schedule is full-time, 8 hours per day, 5 days per week. The work is primarily done from the office with hybrid work options available.
The primary responsibilities for this position include:
- Performing analog and mixed-signal layout
- Troubleshooting and debugging DRC/LVS
- Working closely with design engineers and other layout designers to guarantee high circuit performance
The preferred qualifications for this position include:
- Bachelor's degree in Electronics and Electrical Communications Engineering
- Knowledge of layout matching, isolation, and shielding techniques
- Knowledge of layout-dependent effects
- Knowledge of different CMOS processes (Planar, FinFeT, and SOIs)
- Knowledge of basic layout verifications (LVS/DRC/ANT)
- Familiarity with layout tools (Cadence Virtuoso/Custom Compiler)
- Scripting skills (Skill/Tcl/Perl) is a plus