Senior Rfic Layout Engineer

Requirements:

• Bachelor’s degree in Electrical Engineering preferred, and/or 5+ years related industry experience.
• Must have effective interpersonal, teamwork, and communication skills
• Must have the ability to multi-task in a fast-paced dynamic environment

Key Skills

• Hands-on experience in laying out analog/RF circuits such as: RX/TX sub-blocks, PLLs, Bandgap bias circuits, regulators, and other analog/RF circuits.
• Preferably experienced in mmWave RF ICs 20-40GHz or higher.
• Preferably experienced in Global Foundries SiGe and/or FDX processes. TSMC sub-micron CMOS technologies.
• Able to manage floorplan from unit cells, to block levels, to top level.
• Strong knowledge of Cadence, PVS, Calibre tools. Unix and Skill experience helpful.
• Strong knowledge on IC layout techniques for high frequency design. Parasitics, Coupling, EMIR, IR Drop, Symmetry.
• Able to troubleshoot and solve LVS DRC ERC errors.
• English oral and written communication skills required